1. Field of the Invention
The present invention relates to a semiconductor power converting apparatus with employment of a semiconductor element and the like. More specifically, the present invention relates to a semiconductor power converting apparatus capable of suppressing a peak voltage during a switching operation without requiring a snubber circuit.
2. Description of the Related Art
IGBTs (Insulated-Gate Bipolar Transistor) known as a typical insulated-gate transistor own low gate power consumption and can be switched in high speeds with a small switching loss. Accordingly, these IGBTs are employed in semiconductor power converting apparatuses having relatively medium and small capacities. Furthermore, these IGBTs are desirably applied to semiconductor power converting apparatuses having large capacities. In general, a jump-up voltage xe2x80x9cxcex94Vxe2x80x9d of an IGBT having a snubber circuit is expressed by the following formula (1-1) based upon a capacitance xe2x80x9cCxe2x80x9d of a snubber capacitor:
xcex94V=1{square root over (L/C)}xe2x80x83xe2x80x83(1-1)
In other words, this jump-up voltage xcex94V is direct proportional to both a switching current I and a root-mean-squared value of a wiring inductance L. Therefore, in the case that a wiring inductance L can be minimized and a switching current I is low in a semiconductor power converting apparatus having a medium/small capacity, since a switching loss Eoff of an IGBT is present, this power converting apparatus can be made in a snubberless form, namely a snubber capacitor C is omitted. However, a semiconductor power converting apparatus having a large capacity requires such a snubber circuit for suppressing a peak voltage produced when a large switching current is turned OFF, and furthermore, another snubber circuit for equally sharing a high DC voltage to series-connected semiconductor elements. Thus, switching losses of these snubber circuits would reduce the converter efficiency, namely could not be neglected. Moreover, since the snubber circuits are connected to such a semiconductor power converting apparatus, the cost thereof is increased and this semiconductor power converting apparatus becomes bulky. Also, when a large number of IGBTs are connected in series to each other, both ON timing and OFF timing of all of these IGBTs must be adjusted in high precision in order to equally sharing the voltages to these IGBTs. This requires time and high cost. As a result, very recently, various circuit systems have been proposed. In these circuit systems, the peak voltages are suppressed when the IGBTs are turned OFF. Alternatively, the stational voltage sharing operation for the series-connected IGBTs is uniformly carried out on that any snubber circuit. This recently proposed circuit system corresponds to, as described in Japanese Laid-Open Patent Application No. 11-178318, the gate driving circuit with the basic circuit arrangement such that the zener diode is connected between the collector of the IGBTs and the gate thereof, or the series circuit made of the zener diode and the resistor is connected between the collector and the gate of the IGBT.
In this known gate control circuit, the avalanche current will flow when the collector voltage of the IGBT becomes higher than, or equal to the avalanche voltage of the zener diode, and thus, since the voltage of the gate resistor is increased, the peak value of the collector voltage of this IGBT is suppressed. However, in connection with a high withstanding voltage of an IGBT itself, an avalanche voltage of a zener diode would also require several Kilovolts. Further, in order to rise up the gate voltage of the IGBT by an avalanche current, such avalanche currents having values of several to several tens of Amperes are required. In addition, a resistance value of a gate resistor would also require approximately several tens of Ohms, so that the switching loss of this IGBT would be increased.
Conventionally, when the peak voltage of the IGBT is suppressed, since the withstanding voltage of the IGBT is increased, the avalanche voltage of the zener diode connected to the collector of the IGBT must be high. Furthermore, the avalanche current of the zener diode must be increased, or the gate resistance value must be increased instead of increasing of the switching loss. As a result, there are such problems that the higher withstanding voltage of the IGBT cannot be realized, but also the switching loss is increased.
Also, in the case that a plurality of IGBTs which are simultaneously switched are connected in series to each other by employing the conventional circuit system capable of suppressing the peak voltage produced when the IGBT is turned OFF, if the characteristic fluctuations as to the respective circuit elements are not strictly selected and are not made coincident with each other, then the peak voltages produced when the plural IGBTs are turned OFF are fluctuated, and also the stationary voltage sharing conditions are fluctuated. These circuit elements are the IGBTs, the resistor, the zener diodes, and the transistors, which constitute this conventional circuit system. As a consequence, the switching frequency could not be made high.
The present invention has been made to solve the above-explained problems, and therefore, has an object to provide a semiconductor power converting apparatus capable of making an electric power converting apparatus compact and in low cost, and capable of operating the electric power converting apparatus in a high efficiency.
To solve the above-explained problems, a semiconductor power converting apparatus, according to the present invention, is featured by comprising: a semiconductor element for controlling a current flowing between a collector and an emitter in response to a gate condition; driving device connected to the gate, for driving the gate in response to a drive signal entered therinto; voltage applying device for applying both a forward bias and a reverse bias to the gate so as to set the emitter of the semiconductor element to a neutral potential; and voltage dividing device for dividing a voltage appearing between the collector and the emitter of the semiconductor element; wherein: when the drive signal is under OFF state, a voltage produced based upon the divided voltage by the voltage dividing device is applied to the gate; and the gate voltage is controlled in response to the voltage appearing between the collector and the emitter of the semiconductor element.
Also, a semiconductor power converting device, according to the present invention, is featured by that as the voltage dividing device for dividing the voltage appearing between the collector and the emitter of the semiconductor element, this voltage dividing device includes the collector and a minus-polarity terminal for applying the reverse bias voltage.
Also, a semiconductor power converting apparatus, according to the present invention, is featured by comprising; selecting device made by a switching element connected to a gate of a semiconductor element typically known as an insulating gate transistor, capable of selecting a drive signal in response to either an ON command or an OFF command issued by a control device; a voltage source for applying both a forward bias and a reverse bias to the gate while setting the emitter for driving the semiconductor element as a neutral potential; and voltage dividing device for dividing a voltage appearing between the collector of the semiconductor element and a minus-sided electrode of the voltage source by employing a resistor, in which when the drive signal is an OFF command, a gate voltage of the semiconductor element becomes such a voltage value corresponding to the voltage division; in which when the voltage appearing between the collector of the semiconductor element and the emitter thereof is higher than, or equal to a predetermined voltage, the voltage dividing device can suppress this peak voltage. With employment of this circuit arrangement, the reverse bias voltage can be applied just after the semiconductor element is turned OFF without increasing the gate resistance with being turned OFF. When the voltage between the collector and the emitter of the semiconductor element is higher than, or equal to predetermined voltage set by the voltage dividing ratio, the gate voltage is switched from the reverse bias voltage to the forward bias voltage in response to the emitter between the collector and the emitter. Furthermore, when the voltage between the collector and the emitter of the semiconductor element becomes high, the peak voltage of the voltage between the collector and the emitter is suppressed by utilizing the gate voltage of the forward bias voltage in response to this voltage between the collector and the emitter.
Also, a semiconductor power converting apparatus, according to the present invention, is featured by comprising; selecting device made by a switching element connected to a gate of a semiconductor element, capable of selecting a drive signal in response to either an ON command or an OFF command issued by a control device; a voltage source for applying both a forward bias and a reverse bias to the gate while setting the emitter for driving the semiconductor element as a neutral potential; voltage dividing device for dividing a voltage appearing between the collector of the semiconductor element and the emitter thereof, or a voltage appearing between the collector of the semiconductor element and a minussided electrode of the voltage source by employing a resistor, in which when the drive signal is an OFF command, a gate voltage of the semiconductor element is brought into such a voltage condition corresponding to the voltage division; and switching device for switching the gate voltage in such a manner that the gate voltage is equal to a negative voltage corresponding to the source voltage of the voltage source when the divided voltage detected by the voltage dividing device is lower than, or equal to a set voltage, and also the gate voltage is equal to a voltage value produced based upon the divided voltage when the divided voltage by the voltage dividing device is higher than, or equal to the set voltage; in which when the voltage appearing between the collector of the semiconductor element and the emitter thereof is higher than, or equal to a predetermined voltage, the voltage dividing device can suppress a peak voltage, whereas when the voltage between the collector and the emitter of the semiconductor element is lower than, or equal to the predetermined voltage, the reverse bias is applied to the gate. With employment of this circuit arrangement, the reverse bias voltage can be applied just after the semiconductor element is turned OFF without increasing the gate resistance when being turned OFF. When the voltage between the collector and the emitter of the semiconductor element is higher than, or equal to predetermined voltage set by the voltage dividing ratio, the gate voltage is switched from the reverse bias voltage to the forward bias voltage in response to the emitter between the collector and the emitter. When the voltage between the collector and the emitter of the semiconductor element is lower than, or equal to a predetermined voltage, the reverse bias voltage is applied to the gate so as to increase the noise margin performance. Furthermore, when the voltage between the collector and the emitter of the semiconductor element becomes high, the peak voltage of the OFF-voltage between the collector and the emitter is suppressed by applying the gate voltage of the forward bias voltage directly proportion to this voltage between the collector and the emitter.
Also, a semiconductor power converting device, according to the present invention, is featured by comprising: a driving device connected to a gate of a semiconductor element, for applying both a forward bias and a reverse bias to the gate of the semiconductor element by employing a first switch and a second switch, the first switch series-connected to a resistor being turned ON in response to an ON command issued by a control device, and the second switch series-connected to a resistor being turned ON in response to an OFF command issued by the control device; a voltage source for applying both a forward bias and a reverse bias to the gate while setting the emitter for driving the semiconductor element as a neutral potential; voltage dividing device for dividing a voltage appearing between the collector of the semiconductor element and the emitter thereof, or a voltage appearing between the collector of the semiconductor element and a minus-sided electrode of the voltage source by employing a resistor, and for detecting a voltage appearing between the collector and the emitter of the semiconductor element; and adjusting device constituted by a third switch parallel-connected to a first switch, and a fourth switch series-connected to a second switch, for adjusting a gate signal based upon the voltage value divided by the voltage dividing device. As a result, the switching losses produced when the semiconductor element is turned ON and also turned OFF can be reduced. Also, when the voltage between the collector and the emitter of the semiconductor element is higher than, or equal to a predetermined voltage, this peak voltage can be suppressed. With employment of this circuit arrangement, in such a case that the collector current of the semiconductor element is small, the switching loss is reduced even under such a condition that the peak voltage is not substantially suppressed. In the case that the voltage between the emitter and the collector of the semiconductor element is higher than, or equal to a predetermined voltage set by a voltage dividing ratio, the gate voltage is switched from the reverse bias voltage to a bias voltage direct proportional to the forward bias voltage. Furthermore, when the voltage between the collector and the emitter of the semiconductor element becomes high, the peak voltage of the voltage between the collector and the emitter is suppressed by utilizing the gate voltage of the forward bias voltage in response to this voltage between the collector and the emitter.
Furthermore, a semiconductor power converting apparatus, according to the present invention, is featured by that either a zener diode or a voltage source is inserted in series to a voltage dividing resistor which divides a voltage appearing between an emitter and a collector of a semiconductor element so as to increase a changing ratio of a gate voltage with respect to the voltage between the emitter and the collector of this semiconductor element while a peak voltage is suppressed. As a result, the peak voltage suppressing effect is improved. With employment of the circuit arrangement, the peak voltage suppressing operation when the semiconductor element is turned OFF can be effectively carried out.
Furthermore, a semiconductor power converting apparatus, according to the present invention, is featured by that a circuit constituted by either a capacitor or a switch is connected in parallel to a portion of a voltage dividing resistor which divides a voltage appearing between a collector of a semiconductor element and an emitter thereof, and such a device is provided which changes a voltage dividing ratio in such a manner that a relationship between the gate voltage and the collector potential can be continuously, or stepwise changed, and rising of the collector potential is commenced. Then, the voltage dividing device can suppress a peak voltage appearing between the collector and the emitter by changing the setting condition even when dv/dt of the voltage between the collector and the emitter of the semiconductor element is high. With employment of this circuit arrangement, in order to increase the efficiency of the semiconductor power converting apparatus, it is possible to increase the dv/dt of the voltage between the collector and the emitter when the current of the semiconductor element is interrupted. Also, another peak voltage by charging time of the gate capacitance of the semiconductor element can be suppressed even for a high dv/dt occurred other than the current interruption of the semiconductor element.
Furthermore, a semiconductor power converting apparatus, according to the present invention, is featured by employing a device for changing a voltage dividing ratio by way of a timer switch connected in parallel to a portion of a voltage dividing resistor which divides a voltage appearing between a collector of a semiconductor element and an emitter thereof. Then, after the semiconductor element has been turned OFF, the voltage between the collector and the emitter of the semiconductor element is stationally stabilized with respect to the power supply voltage. After a preselected time period has passed, the voltage dividing ratio is changed into a higher value than the power supply voltage, so that the reverse bias can be applied to the gate of the semiconductor element. With employment of this circuit arrangement, a voltage between the collector of the semiconductor element and the emitter thereof after the peak voltage has been suppressed is stabilized to becomes such a voltage obtained by dividing the power supply voltage by a total number of series-connected elements. Thereafter, the reverse bias can be applied to the gate, so that the noise margin may be improved in order that the erroneous ON state never occurs.
Furthermore, a semiconductor power converting apparatus, according to the present invention, is featured by that more than two sets of semiconductor elements are connected in series to each other so as to constitute an arm, the arms are simultaneously turned ON, or OFF. Then, a voltage dividing ratio of a voltage dividing device is set in such a manner that the voltages between the collectors and the emitters of the respective semiconductor elements can be equally shared, so that the voltages between the collectors and the emitters of the series-connected semiconductor elements may be made equal. With employment of this circuit arrangement, in such a semiconductor power converting apparatus that a plurality of series-connected semiconductor elements are simultaneously turned ON or OFF, the peak voltage of the voltage appearing between the collector and the emitter of each of the semiconductor elements series-connected to each other can be suppressed. Also, the stationary voltage stabilizing operation after suppressing the peak voltage is carried out in a highspeed, and the switching frequency of the semiconductor power apparatus converting apparatus is increased. As a result, the power converting efficiency can be increased.
Also, a semiconductor power converting apparatus, according to the present invention, is featured by comprising: a semiconductor element for controlling a current flowing between a collector and an emitter in response to a gate condition; drive device connected to the gate, for driving the gate in response to a drive signal; bias applying device for applying both a forward bias and a reverse bias to the gate; and voltage dividing device for dividing a voltage appearing between the collector and the emitter of the semiconductor element; wherein: when the drive signal is under OFF state and also a voltage appearing between the collector and the emitter is higher than, or equal to the voltage determined by the voltage dividing means the bias applying means applies a forward bias to the gate.